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64ch common driver f or dot matrix lcd s 6b0107 1 introduction the s6b0107 (tqfp type: s6b2107) is an lcd driver lsi with 64 channel outputs for dot matrix liquid crystal graphic display systems. this device provides 64 shift registers and 64 output drivers. it genera tes the timing signal to control the S6B0108 (64 channel segment driver ? tqfp type: s6b2108). the s6b0107 is fabricated by low power cmos high voltage process technology, and is composed of the liquid crystal display system in combination with the S6B0108 (64 channel segment driver). features dot matrix lcd common driver with 64 channel output 64 - bit shift register at internal lcd driver circuit internal timi ng generator circuit for dynamic display selection of master/slave mode applicable lcd duty: 1/48, 1/64, 1/96, 1/128 power supply voltage: + 5v 10% lcd driving voltage: 8v - 17v (v dd - v ee ) interface driver common segment controller other s6b0107 S6B0108 mpu high voltage cmos process 100qfp / 100tqfp or bare chip available
s6b0107 64ch common driver for dot matr ix lcd 2 block diagram 64 bit 4- level driver 64 bit bi-directional shift register data shift direction & phase selection control circuit osc c1 c2 c3 c62 c63 c64 v0l v1l v4l v5l dio1 pclk2 shl c r m cl2 dio2 v5r timing generator circuit cr frm clk1 clk2 v dd v ss v ee ds1 ds2 ms fs v4r v1r v0r
64ch common driver f or dot matrix lcd s 6b0107 3 pin configuration 100 qfp s6b0107 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 c22 c21 c20 c19 c18 c17 c16 c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 v ee v1l v4l v5l v0l v dd dio1 fs c23 c24 c25 c26 c27 c28 c29 c30 c31 c32 c33 c34 c35 c36 c37 c38 c39 c40 c41 c42 ds1 ds2 c nc r nc cr nc shl v ss nc ms clk2 clk1 nc frm m nc pclk2 dio2 c43 c44 c45 c46 c47 c48 c49 c50 c51 c52 c53 c54 c55 c56 c57 c58 c59 c60 c61 c62 c63 c64 v ee v1r v4r v5r v0r nc cl2 nc
s6b0107 64ch common driver for dot matr ix lcd 4 pad diagram (chip la yout for the 100qfp) 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 1 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 c22 c23 c24 c25 c26 c27 c28 c29 c30 c31 c32 c33 c34 c35 c36 c37 c38 c39 c40 c41 c42 c43 v dd dio1 fs ds1 ds2 c nc r nc cr nc shl v ss nc ms clk2 clk1 nc frm m nc pclk2 dio2 nc cl2 nc 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 c21 c20 c19 c18 c17 c16 c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 v ee v1l v4l v5l v0l chip size: 3450 4000 pad size: 100 100 unit : m m (0, 0) x y 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 c44 c45 c46 c47 c48 c49 c50 c51 c52 c53 c54 c55 c56 c57 c58 c59 c60 c61 c62 c63 c64 v ee v1r v4r v5r v0r t here is the mark s6b0107 on the center of the chip.
64ch common driver f or dot matrix lcd s 6b0107 5 pad center coordinat es (100qfp) pad number pad name coordinate pad number pad name coordinate pad number pad name coordinate x y x y x y 1 c22 - 1314.5 1775.4 32 ds2 - 677.6 - 1775 71 c52 1500.9 630 2 c21 - 1499.9 1630 34 c - 527.6 - 1775 72 c51 1500.9 755 3 c20 - 1499.9 1505 35 r - 377.6 - 1775 73 c50 1500.9 880 4 c19 - 1499.9 1380 37 cr - 227.6 - 1775 74 c49 1500.9 1005 5 c18 - 1499.9 1255 39 shl - 77.6 - 1775 75 c48 1500.9 1130 6 c17 - 1499.9 1130 40 vss 113.8 - 1775 76 c47 1500.9 1255 7 c16 - 1499.9 1005 42 ms 308.7 - 1775 77 c46 1500.9 1380 8 c15 - 1499.9 880 43 clk2 458.7 - 1775 78 c45 1500.9 1505 9 c14 - 1499.9 755 44 clk1 608.7 - 1775 79 c44 1500.9 1630 10 c13 - 1499.9 630 46 frm 758.7 - 1775 80 c43 1310.5 1775.4 11 c12 - 1499.9 505 47 m 908.7 - 1775 81 c42 1185.5 1775.4 12 c11 - 1499.9 380 49 pclk2 1058.7 - 1775 82 c41 1060.5 1775.4 13 c10 - 1499.9 255 50 di02 1208.7 - 1775 83 c40 935.5 1775.4 14 c9 - 1499.9 130 52 cl2 1358.7 - 1775 84 c39 810.5 1775.4 15 c8 - 1499.9 5 54 v0r 1500.9 - 1495 85 c38 685.5 1775.4 16 c7 - 1499.9 - 120 55 v5r 1500.9 - 1370 86 c37 560.5 1775.4 17 c6 - 1499.9 - 245 56 v4r 1500.9 - 1245 87 c36 435.5 1775.4 18 c5 - 1499.9 - 370 57 v1r 1500.9 - 1120 88 c35 310.5 1775.4 19 c4 - 1499.9 - 495 58 vee 1500.9 - 995 89 c34 185.5 1775.4 20 c3 - 1499.9 - 620 59 c64 1500.9 - 870 90 c33 60.5 1775.4 21 c2 - 1499.9 - 745 60 c63 1500.9 - 745 91 c32 - 64.5 1775.4 22 c1 - 1499.9 - 870 61 c62 1500.9 - 620 92 c31 - 189.5 1775.4 23 vee - 1499.9 - 995 62 c61 1500.9 - 495 93 c30 - 314.5 1775.4 24 v1l - 1499.9 - 1120 63 c60 1500.9 - 370 94 c29 - 439.5 1775.4 25 v4l - 1499.9 - 1245 64 c59 1500.9 - 245 95 c28 - 564.5 1775.4 26 v5l - 1499.9 - 1370 65 c58 1500.9 - 120 96 c27 - 689.5 1775.4 27 v0l - 1499.9 - 1495 66 c57 1500.9 5 97 c26 - 814.5 177 5.4 28 vdd - 1345.6 - 1775 67 c56 1500.9 130 98 c25 - 939.5 1775.4 29 di01 - 1127.6 - 1775 68 c55 1500.9 255 99 c24 - 1064.5 1775.4 30 fs - 977.6 - 1775 69 c54 1500.9 380 100 c23 - 1189.5 1775.4 31 ds1 - 827.6 - 1775 70 c53 1500.9 505
s6b0107 64ch common driver for dot matr ix lcd 6 100 tqfp (s6b2107) c19 c18 c17 c16 c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 v ee v1l v4l v5l v0l v dd s6b2107 (100 tqfp) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 c44 c43 c42 c41 c40 c39 c38 c37 c36 c35 c34 c33 c32 c31 c30 c29 c28 c27 c26 c25 c24 c23 c22 c21 c20 nc cl2 nc dio2 pclk2 nc m frm nc clk1 clk2 ms nc vss shl nc cr nc r nc c ds2 ds1 fs dio1 c45 c46 c47 c48 c49 c50 c51 c52 c53 c54 c55 c56 c57 c58 c59 c60 c61 c62 c63 c64 v ee v1r v4r v5r v0r
64ch common driver f or dot matrix lcd s 6b0107 7 pad diagram (chip la yout for the 100 - tqf p) 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 c20 c21 c22 c23 c24 c25 c26 c27 c28 c29 c30 c31 c32 c33 c34 c35 c36 c37 c38 c39 c40 c41 c42 c43 c44 dio1 fs ds1 ds2 c nc r nc cr nc shl v ss nc ms clk2 clk1 nc frm m nc pclk2 dio2 nc cl2 nc c45 c46 c47 c48 c49 c50 c51 c52 c53 c54 c55 c56 c57 c58 c59 c60 c61 c62 c63 c64 v ee v1r v4r v5r v0r 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 c19 c18 c17 c16 c15 c14 c13 c12 c11 c10 c9 c8 c7 c6 c5 c4 c3 c2 c1 v ee v1l v4l v5l v0l v dd chip size: 3850 x 100 pad size: 100 x 100 unit : m m (0, 0) x y there is the mark s6b2107 on the center of the chip.
s6b0107 64ch common driver for dot matr ix lcd 8 pad center coordinates (100 - tqfp) pad number pad name coordinate pad number pad name coordinate pad number pad name coordinate x y x y x y 1 c19 - 1697 1534 35 nc 69 c51 1697 784 2 c18 - 1697 1409 36 shl - 195 - 1821 70 c50 1697 909 3 c17 - 1697 1284 37 vss 0 - 1821 71 c49 1697 1034 4 c16 - 1697 1159 38 nc 72 c48 1697 1159 5 c15 - 1697 1034 39 ms 195 - 1821 73 c47 1697 1284 6 c14 - 1697 909 40 clk2 345 - 1821 74 c46 1697 1409 7 c13 - 1697 784 41 clk1 495 - 1821 75 c45 1697 1534 8 c12 - 1697 659 42 nc 76 c44 1500 1822 9 c11 - 1697 534 43 frm 645 - 1821 77 c43 1375 1822 10 c10 - 1697 409 44 m 795 - 1821 78 c42 1250 1822 11 c9 - 1697 284 45 nc 79 c41 1125 1822 12 c8 - 1697 159 46 pclk2 945 - 1821 80 c40 1000 1822 13 c7 - 1697 34 47 dio2 1095 - 1821 81 c39 875 1822 14 c6 - 1697 - 91 48 nc 82 c38 750 1822 15 c5 - 1697 - 216 49 cl2 1245 - 1821 83 c37 625 1822 16 c4 - 1697 - 3 41 50 nc 84 c36 500 1822 17 c3 - 1697 - 466 51 v0r 1697 - 1466 85 c35 375 1822 18 c2 - 1697 - 591 52 v5r 1697 - 1341 86 c34 250 1822 19 c1 - 1697 - 716 53 v4r 1697 - 1216 87 c33 125 1822 20 vee - 1697 - 841 54 v1r 1697 - 1091 88 c32 0 1822 21 v1l - 1697 - 966 55 ve e 1697 - 966 89 c31 - 125 1822 22 v4l - 1697 - 1091 56 c64 1697 - 841 90 c30 - 250 1822 23 v5l - 1697 - 1216 57 c63 1697 - 716 91 c29 - 375 1822 24 v0l - 1697 - 1341 58 c62 1697 - 591 92 c28 - 500 1822 25 vdd - 1697 - 1466 59 c61 1697 466 93 c27 - 625 1822 26 dio1 - 12 45 - 1821 60 c60 1697 - 341 94 c26 - 750 1822 27 fs - 1095 - 1821 61 c59 1697 - 216 95 c25 - 875 1822 28 ds1 - 945 - 1821 62 c58 1697 - 91 96 c24 - 1000 1822 29 ds2 - 795 - 1821 63 c57 1697 34 97 c23 - 1125 1822 30 c - 645 - 1821 64 c56 1697 159 98 c22 - 1250 1822 31 nc 65 c55 1697 284 99 c21 - 1375 1822 32 r - 495 - 1821 66 c54 1697 409 100 c20 - 1500 1822 33 nc 67 c53 1697 534 34 cr - 345 - 1821 68 c52 1697 659
64ch common driver f or dot matrix lcd s 6b0107 9 pin description table 1. pin description pin number qfp (tqfp) symbol i/o description 28(25) 40(37 ) 23(20), 58(55) v dd v ss v ee power for internal logic circuit (+5v 10%) gnd ( = 0 v) for lcd driver circuit 27(24), 54(51) 24(21), 57(54) 25(22), 56(53) 26(23), 55(52) v0l, v0r v1l, v1r v4l, v4r v5l, v5r power bias supply voltage terminals to drive lcd. slelect level v0l (r), v5l (r) non-select level v1l (r), v4l (r) v0l and v0r (v1l & v1r, v4l & v4r, v5l & v5r) should be connected by the same voltage. 42(39) ms input selection of master/slave mode - master mode (ms = 1) dio1, dio2, cl2 and m is output stat e. - slave mode (ms = 0) shl = 1 ? dio1 is input state (dio2 is output state) shl = 0 ? dio2 is input state (dio1 is output state) cl2 and m are input state. 39(36) shl input selection o f data shift direction. shl h l data shift direction dio1 ? c1 ...... c64 ? dio2 dio2 ? c64 ...... c1 ? dio1 49(46) pclk2 input selection of shift clock (cl2) phase. pclk2 h l shift clock (cl2) phase data shift at the rising edge of cl2 data shift at the falling edge of cl2 30(27) fs input selection of oscillation frequency. - master mode when the frame frequency is 70 hz, the oscillation fr equency should be fosc = 430khz at fs = 1(v dd ) fosc = 215khz at fs = 0(v ss ) - slave mode connect to v dd .
s6b0107 64ch common driver for dot matr ix lcd 10 table 1. pin description (continued) pin number qfp (tqfp) symbol i/o description 31(28) 32(29) ds1 ds2 input selection of disp lay duty. - master mode ds1 l ds2 l l h h l duty 1/48 1/64 1/96 h h 1/128 - slave mode connect to v dd 33(30) 35(32) 37(34) c r cr rc oscillator - master mode: use these terminals as shown below. s6b0107 r c r f cr c f s6b0107 r c cr open open external - slave mode: stop the oscillator as shown below. r c cr open open v dd 44(41) 43(40) clk1 clk2 output operating clock output for the S6B0108 - master mode: connection to clk1 and clk2 of the S6B0108 - slave mode: open 46(43) frm output synchronous frame signal. - master mode: connection to frm of the S6B0108 - slave mode: open 47(44) m input/ output alternating signal input for lcd driving. - master mode: output state connection to m of the S6B0108 - slave mode: input state connection to the controller 52(49) cl2 input / output data shift clock - mas ter mode: output state connection to cl of the S6B0108 - slave mode: input state connection to shift clock terminal of the controller.
64ch common driver f or dot matrix lcd s 6b0107 11 29(26) 50(47) dio1 dio2 input/ output data input/output pin of internal shift register. ms h ds2 h l l l dio1 output output input h output dio2 output output output input
s6b0107 64ch common driver for dot matr ix lcd 12 table 1. pin description (continued) pin number qfp (tqfp) symbol i/o description 22 - 1(19 - 1) 100 - 59(100 - 56) c1 - c64 output common signal output for lcd driving. data l l h h m out l h l h v 1 v 4 v 5 v 0 34(31), 36(33) 38(35), 41(38) 45(42), 48(45) 51(48), 53(50) nc no c onnection maximum absolute lim it characteristic symbol value unit note operating voltage v dd - 0.3 to +7.0 v (1) supply voltage v ee v dd - 19.0 to v dd +0.3 v (4) driver supply voltage v b - 0.3 to v dd +0.3 v (1), (2) v lcd v ee - 0.3 to v dd +0.3 v (3), (4) opera ting temperature t opr - 30 to +85 c - storage temperature t stg - 55 to +125 c - notes: 1. based on v ss = 0v 2. applies to input terminals and i/o terminals at high impedance. (except v0l(r), v1l(r), v4l(r) and v5l(r)) 3. applies to v0l(r), v1l(r), v4l(r) and v5l(r). 4. voltage level: v dd 3 v0l = v0r 3 v1l = v1r 3 v4l = v4r 3 v5l = v5r 3 v ee .
64ch common driver f or dot matrix lcd s 6b0107 13 electrical character istics dc characteristics (v dd = +5v 10%, v ss = 0v, |v dd - v ee |=8 - 17v, ta = - 30 - +85 c) characteristic symbol conditio n min typ max unit note high v ih - 0.7v dd - v dd v (1) input voltage low v il v ss - 0.3v dd high v oh i oh = - 0.4ma v dd - 0.4 - - v (2) output v oltage low v ol i ol = 0.4ma - - 0.4 input leakage current i lkg v in = v dd - v ss - 1.0 - 1.0 m a (1) osc frequency f osc rf = 47k w 2% cf = 20pf 5% 315 450 585 khz on resistance (vdiv - c i ) r on v dd - v ee = 17v load current = 150 m a - - 1.5 k w operating current i dd1 master mode 1/128 duty - - 1.0 ma (3) i dd2 slave mode 1/128 duty - - 200 m a (4) supply current i ee master mode 1/128 duty - - 100 (5) operating f op1 master mode external clock 50 - 600 khz frequency f op2 slave mode 0.5 - 1500 notes: 1. applies to input terminals fs, ds1, ds2, cr, shl, ms and pclk2 and i/o terminals dio1, dio2, m and cl2 in the input state. 2. applies to output terminals clk1, clk2 and frm and i/o terminals dio1, dio2, m and cl2 in the output state. 3. this value is specified at about the current flowing through v ss . internal oscillation circuit: rf = 47k w , cf = 20pf . each terminal of ds1, ds2, fs, shl and ms is connected to v dd and out is no load. 4. this value is specified at about the current flowing through v ss . each terminal of ds1, ds2, fs, shl, pclk2 and cr is connected to v dd , and ms is connecte d to v ss . cl2, m, dio1 is external clock. 5. this value is specified at about the current flowing through v ee . don?t connect to v lcd (v1 - v5).
s6b0107 64ch common driver for dot matr ix lcd 14 ac characteristics (v dd = 5v 10%, ta = - 30 c - +85 c) master mode (ms = v dd , pclk2 = v dd , cf = 20pf, rf = 47k w ) cl2 dio1 (shl = v dd ) dio2 (shl = v ss ) clk1 t su t su t d dio2 (shl = v dd ) dio1 (shl = v ss ) frm m clk2 0.7v dd 0.3v dd 0.7v dd 0.3v dd t wlc t whc t df t dm t dm t f t r t wh1 t d12 t wl1 t d21 t f t r t wh2 t d t dh t whc
64ch common driver f or dot matrix lcd s 6b0107 15 master mode characteristic symbol min typ max unit data setup time t su 20 - - m s data hold time t dh 40 - - data delay time t d 5 - - frm delay time t df - 2 - 2 m delay time t dm - 2 - 2 cl2 low level width t wlc 35 - - cl2 high level width t whc 35 - - clk1 low level width t wl1 700 - - ns clk2 low level width t wl2 700 - - clk1 high level width t wh1 2100 - - clk2 high level width t wh2 2100 - - clk1 - clk2 phase difference t d12 700 - - clk2 - clk1 phase difference t d21 700 - - clk1, clk2 rise/fall time t r / t f - - 150
s6b0107 64ch common driver for dot matr ix lcd 16 slave mode (ms = v ss ) t wlc t whc1 cl2 (plk2 = v ss ) cl2 (plk2 = v d d ) dio1 (shl = v d d ) dio2 (shl = v ss ) input data dio1 (shl = v d d ) dio2 (shl = v ss ) onput data t f t r t wlc1 0.7v dd 0.3v dd 0.7v dd 0.3v dd 0.7v dd 0.3v dd t whc2 t su t r t f t d t hcl t h characteristics symbol min typ max unit note cl2 low level width t wlc1 450 - - ns pclk2 = v ss cl2 high level width t whc1 150 - - ns pclk2 = v ss cl2 low level width t wlc2 150 - - ns pclk2 = v dd cl2 high level width t whl 450 - - ns pclk2 = v dd data setup time t su 100 - - ns data hold time t dh 100 - - ns data delay time t d - - 200 ns (note) output data hold time t h 10 - - ns cl2 rise/fall time t r /t f - - 30 ns note: connect load cl = 30pf output 30pf
64ch common driver f or dot matrix lcd s 6b0107 17 functional descripti on rc oscillator the rc oscillator generates cl2, m, frm of the s6b0107, and clk1 and clk2 of the S6B0108 by the oscillation resister r and capacitor c. when selecting the master/slave mode, the oscillation circuit is as following: master mode: in the master mode, use these te rminals as shown below. s6b0107 r c r f cr c f 47k w 20pf internal oscillation s6b0107 r c cr open open external clock external clock slave mode: in the slave mode, stop the oscillator as shown below. s6b0107 r c cr open open v dd timing generation circuit it generates cl2, m, frm, clk1 and clk2 by the frequency from the oscillation circuit. selection of master/slave (m/s) mode - when m/s is h, it generates cl2, m, frm, clk1 and clk2 internally. - when m/s is ?l?, it operates by receiving m and cl2 from the master device. frequency selection (fs) to adjust frm frequency by 70hz, the oscillat ion frequency should be as follows: fs oscillation frequency h f osc = 430khz l f osc = 215khz in the slave mode, it is connected to v dd .
s6b0107 64ch common driver for dot matr ix lcd 18 duty selection (ds1, ds2) it provides various duty selections according to ds1 and ds2. ds1 ds2 duty l l 1/48 h 1/64 h l 1/96 h 1/128 data shift & phase select control phase selection it is a circuit to shift data on synchronization or rising edge, or falling edge of the cl2 according to pclk2. pclk2 phase selection h data shift on rising edge of cl2 l data s hift on falling edge of cl2 data shift direction selection when m/s is connected to v dd , dio1 and dio2 terminal is only output. when m/s is connected to v ss , it depends on the shl. ms shl dio1 dio2 direction of data h h output output c1 ? c64 l output output c64 ? c1 l h input output dio1 ? c1 ? c64 ? dio2 l output input dio2 ? c64 ? c1 ? dio1
64ch common driver f or dot matrix lcd s 6b0107 19 timing diagram 1/48 duty timing (ma ster mode) condition: ds1 = l, ds2 = l, shl = h(l), pclk2 = h relation of cl2 & dio1 ( dio2 ) c clk1 clk2 cl2 frm dio1 ( dio2 ) m c1 ( c48 ) c2 ( c47 ) c47 ( c2 ) c48 ( c1 ) dio2 ( dio1 ) clk2 cl2 dio1 ( dio2 ) 1 2 3 63 64 1 2 3 46 47 48 1 2 3 46 47 48 v0 v4 v0 v1 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ v1 v4 v4 v5 v1 v1 v5 v1 v4 v0 v4 v4 v0 v4 v4 v1 v1 v4 v1 v5 v5 v1 v1 v5 v5 v0
s6b0107 64ch common driver for dot matr ix lcd 20 1/128 duty timing (m aster mode ) condition: ds1 = h, ds2 = h, shl = h(l), pclk2 = h relation of cl2 & dio1 ( dio2 ) c clk1 clk2 cl2 frm dio1 ( dio2 ) m c1 ( c128 ) c2 ( c127 ) c127 ( c2 ) c128 ( c1 ) dio2 ( dio1 ) clk2 cl2 dio1 (dio2) 1 2 3 23 24 1 2 3 126 127 128 1 2 3 126 127 128 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ v4 v0 v4 v4 v5 v5 v1 v1 v1 v1 v1 v5 v1 v5 v0 v4 v0 v4 v4 v0 v5 v1 v5 v1 v4 v4 v1 v1 v0 v4
64ch common driver f or dot matrix lcd s 6b0107 21 1/48 duty timing (sl ave mode) condition: pclk2 = l, shl = h(l) 1 2 46 47 48 1 2 46 47 48 cl2 m dio1 ( dio2 ) c1 ( c48 ) c2 ( c47 ) c47 ( c2 ) c48 ( c1 ) dio2 ( dio1 ) ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ v1 v0 v1 v4 v0 v1 v4 v5 v4 v4 v4 v5 v1 v5 v1 v1 v0 v4 v0 v1 v1 v5 v1 v5 v4 v4 v4 v4 v0
s6b0107 64ch common driver for dot matr ix lcd 22 power driver circuit to S6B0108 v0 v1 v2 v3 v4 v5 v dd r1 r1 r2 r1 r1 vr v0l/r v1l/r v4l/r v5l/r v ee s6b0107 v dd v ee relation of duty & bias duty bias rd iv 1/48 1/8 r2 = 4r1 1/64 1/9 r2 = 5r1 1/96 1/11 r2 = 7r1 1/128 1/12 r2 = 8r1 when duty factor is 1/48, the value of r1 & r2 should satisfy. r1/(4r1 + r2) = 1/8 r1 + 3k w , r2 = 12k w
64ch common driver f or dot matrix lcd s 6b0107 23 applicati on circuit 1/128 duty s egment drive r (S6B0108) interface circuit lcd panel v0r/l v2r/l v3r/l v5r/l cs3 cs2b cs1b db0 -db7 rstb e r/w rs frm clk1 clk2 m v dd cl v ss v0r/l v2r/l v3r/l v5r/l v ee cs3 cs2b cs1b db0 -db7 rstb e r/w rs frm clk1 clk2 m v dd cl v ss S6B0108 S6B0108 s 1 - s 64 s 1 - s 64 15 15 seg128 seg1 com1 com128 v ee v2r/l v3r/l cs3 cs2b cs1b db0 -db7 rstb e r/w rs frm clk1 clk2 m v dd cl v ss S6B0108 s 1 - s 64 v ee v0r/l v5r/l v ee v2r/l v3r/l cs3 cs2b cs1b db0 -db7 rstb e r/w rs frm clk1 clk2 m v dd cl v ss S6B0108 s 1 - s 64 v0r/l v5r/l mpu rs r/w e rstb db0 - db7 cs1b cs2b cs3 15 15 15 c1 c64 c cr r ds1 ds2 pclk2 ms fs shl v dd v ss v 0r/l v 1r/l v 4r/l v 5r/l v ee dio2 dio1 cl2 m clk2 clk1 frm c1 c64 v dd v ss v 0r/l v 1r/l v 4r/l v 5r/l v ee clk2 clk1 frm c pclk2 fs ds1 ks2 shl cr r dio2 m cl2 ms s6b0107 (master) s6b0107 (slave) 2 5 5 c 1 r 1 open open 5 open open open open open v dd v 0 v 1 v 2 v 3 v 4 v 5 v ee v dd

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